Z Al-Ars, S Hamdioui, AJ van de Goor, G Mueller (2008), Defect oriented testing of the strap problem under process variations in DRAMs, s.n. (Eds.), In Proc. International Test Conference 2008 p.1-10.

S Hamdioui (2008), Design and test of integrated circuits in Nano era: what is next?.

S Hamdioui, Z Al-Ars (2008), Efficient tests and DFT for RAM address decoder delay faults, s.n. (Eds.), In 3rd International Design and Test workshop p.225-230.

NZB Haron, S Hamdioui (2008), Emerging crossbar-based hybrid nanoarchitectures for future computing systems, s.n. (Eds.), In 2nd IEEE Intl. Conf. on Signals, Circuits & Systems p.1-6.

Z Al-Ars, S Hamdioui (2008), Evaluation of SRAM faulty behavior under bit line coupling, s.n. (Eds.), In 3rd International Design and Test workshop p.231-236.

K Yamasaki, S Hamdioui, Z Al-Ars, AJ van Genderen, GN Gaydadjiev (2008), High quality simulation tool for memory redundancy algorithms, s.n. (Eds.), In 19th Annual Workshop on Circuits, Systems and Signal Processing p.133-138.

D Borodin, B Juurlink, S Hamdioui, S Vassiliadis (2008), Instruction-level fault tolerance configurability, In Journal of V LSISignal Processing p.1-17.

Z Al-Ars, S Hamdioui, GN Gaydadjiev, S Vassiliadis (2008), Test set development for cache memory in modern microprocessors, In IEEE Transactions on Very Large Scale Integration (VLSI) Systems Volume 16 p.725-732.

NZB Haron, S Hamdioui (2008), Why is CMOS scaling coming to an END?, M Abid, M Loulou, A Salem, Y Zorian, A Ivanov (Eds.), In 2008 Third international design and test workshop p.98-103.

Z Al-Ars, S Hamdioui (2007), Automatic analyses of memory faulty behaviour in defective memories, Orailoglu, A. Hamdiuoi, S. (Eds.), In Design & Technology of Integrated Systems 2007 p.41-46.