M Taouil, S Hamdioui, CIM Beenakker, E Marinissen (2011), Test Impact on the Overall Die-to-Wafer 3D Stacked IC Cost, In Journal of Electronic Testing: theory and applications p.1-11.

IS Irobi, Z Al-Ars, S Hamdioui, C Thibeault (2011), Testing for Parasitic Memory Effect in SRAMs, A Chatterjee, A Patra, S Kundu, S Ravi (Eds.), In 20th IEEE Asian Test Symposium 2011 p.1-6.

S Hamdioui, M Taouil (2011), Yield improvement and test cost optimization for 3D stacked ICs, A Chatterjee, A Patra, S Kundu, S Ravi (Eds.), In 20th IEEE Asian Test Symposium 2011 p.480-485.

IS Irobi, Z Al-Ars, S Hamdioui (2010), Bit line coupling memory tests for single cell fails in SRAMs, s.n. (Eds.), In 28th IEEE VLSI test symposium p.1-6.

IS Irobi, Z Al-Ars, S Hamdioui (2010), Detecting memory faults in the presence of bit line coupling in SRAM devices, s.n. (Eds.), In Intl. test conference 2010 p.1-10.

NZB Haron, S Hamdioui, Z Ahyadi (2010), ECC design for fault-tolerant crossbar memories: a case study, I Elahi, A Ivanov, Y Zorian, A Salem (Eds.), In 5th Intl. design and test workshop p.61-666.

NZB Haron, S Hamdioui (2010), High-performance cluster-fault tolerance scheme for hybrid nanoelectronic memories, s.n. (Eds.), In 2010 IEEEIntl. symp. on defect and fault tolerance in VLSI systems p.144-151.

M Taouil, S Hamdioui, E Marinissen (2010), Impact of various test flows on the cost in 3D die-to-wafer stacking, s.n. (Eds.), In Proceedings Intl. test conference 2010 p.1-6.

AJ van de Goor, C Jung, S Hamdioui, GN Gaydadjiev (2010), Low-cost, customized and flexible SRAM MBIST engine, s.n. (Eds.), In IEEE Intl. symposium on design and diagnostics of electronic circuits and systems p.382-387.

AJ van de Goor, S Hamdioui (2010), MBIST architecture framework based on orthogonal constructs, A Ivanov, I Elahi, Y Zorian, A Salem (Eds.), In 5th Intl. design and test workshop p.128-133.