K Yamasaki, S Hamdioui, Z Al-Ars, AJ van Genderen, GN Gaydadjiev (2008), High quality simulation tool for memory redundancy algorithms, s.n. (Eds.), In 19th Annual Workshop on Circuits, Systems and Signal Processing p.133-138, STW.

D Borodin, B Juurlink, S Hamdioui, S Vassiliadis (2008), Instruction-level fault tolerance configurability, In Journal of V LSISignal Processing p.1-17.

Z Al-Ars, S Hamdioui, GN Gaydadjiev, S Vassiliadis (2008), Test set development for cache memory in modern microprocessors, In IEEE Transactions on Very Large Scale Integration (VLSI) Systems Volume 16 p.725-732.

NZB Haron, S Hamdioui (2008), Why is CMOS scaling coming to an END?, M Abid, M Loulou, A Salem, Y Zorian, A Ivanov (Eds.), In 2008 Third international design and test workshop p.98-103, IEEE.

Z Al-Ars, S Hamdioui (2007), Automatic analyses of memory faulty behaviour in defective memories, Orailoglu, A. Hamdiuoi, S. (Eds.), In Design & Technology of Integrated Systems 2007 p.41-46, IEEE.

S Hamdioui, A Orailoglu (2007), Design & Technology of Integrated Systems in Nanoscala era, IEEE.

Z Al-Ars, S Hamdioui, GN Gaydadjiev (2007), Manifestation of precharge faults in high speed DRAM devices, Krasniewski, E. Gramatova, E. Girard, P., Garbolina, T. (Eds.), In 2007 IEEE workshop on Design and diagnostics of electronic circuits and systems p.179-184, IEEE.

Z Al-Ars, S Hamdioui, GN Gaydadjiev (2007), Optimizing test length for soft faults in DRAM devices, s.n. (Eds.), In 25th IEEE VLSI Test Symposium p.59-66, IEEE.

S Hamdioui, Z Al-Ars, J Jimenez, J Calero (2007), PPM recuction on embedded memories in system on chip, Lisa O'Conner (Eds.), In 12th IEEE European Test Symposium p.85-90, IEEE.

K Bertels, SD Cotofana, GN Gaydadjiev, KGW Goossens, S Hamdioui, B Juurlink, AJ van Genderen, S Wong (2007), The Future of computing, Computer Engineering TUDelft.