NZB Haron, S Hamdioui, SD Cotofana (2009), Emerging non-CMOS nanoelectronic devices-What are they?, s.n. (Eds.), In The 4th annual IEEE international conference on nano/micro engineered and molecular systems p.63-68.

Z Al-Ars, S Hamdioui (2009), Fault diagnosis using test primitives in random access memories, s.n. (Eds.), In 18th Asian test symposium p.403-408.

NZB Haron, S Hamdioui (2009), Fault tolerance architecture for reliable hybrid CMOS/nanodevices memory.

AJ van de Goor, S Hamdioui, GN Gaydadjiev, Z Al-Ars (2009), New algorithms for address decoder delay faults and bit line imbalance faults, s.n. (Eds.), In 18th Asian test symposium p.391-395.

Z Al-Ars, S Hamdioui (2009), Non-algorithmic stress optimization using simulation for DRAMs, s.n. (Eds.), In 4th Intl. design and test workshop 2009 p.1-6.

NZB Haron, S Hamdioui (2009), Residue-based code for reliable hybrid memories, s.n. (Eds.), In 2009 IEEE/ACM international symposium on nanoscale architectures p.27-32.

S Hamdioui, Z Al-Ars (2009), Scan more with memory scan test, s.n. (Eds.), In 4th IEEE international conference on design & technology of integrated systems in nanoscale era p.204-209.

NZB Haron, S Hamdioui (2009), Using RRNS codes for cluster faults tolerance in hybrid memories, D Gizopoulos, M Tehranipoor, S Tragoudas (Eds.), In 2009 IEEE international symposium on defect and fault tolerance in VLSI systems p.85-93.

S Hamdioui, Z Al-Ars, J Jimenez, J Calero (2008), BIST enhancement for detecting bit/byte write enable faults in SOC SCRAMs, s.n. (Eds.), In 2nd IEEE Intl. Conf. on Signals, Circuits & Systems p.1-5.

MSK Seyab, NZB Haron, S Hamdioui (2008), CMOS scaling impacts on reliability, what do we understand?, s.n. (Eds.), In 19th Annual Workshop on Circuits, Systems and Signal Processing p.260-266.