C Lageweg, SD Cotofana, S Vassiliadis (2001), Digital to analog conversion performed in single electron technology, In IEEE-NANO 2001: proceedings p.105-110, IEEE.

S Vassiliadis, ? ... [et Al] (2001), Editorship:, In Euro-Par 2001: proceedings p.-, Springer.

H Corporaal (2001), Embedded processor design using transport triggered architectures, RHJM Otten (Eds.), In Proceedings p.25-34, IEEE.

MJ Geuzebroek, AJ van de Goor Ph D, JT van Linden (2001), Facilitating automatic test pattern generators using test point insertion, In Global Semiconductor Manufacturing Technology p.149-152, Business Briefing.

T Niculiu, SD Cotofana (2001), Hierarchical intelligent simulation, In ESM'2001: proceedings p.243-246, Society for Computer Simulation International.

S Hamdioui, AJ van de Goor, D Eastwick, M Rodgers (2001), Impact of spot defects on fault modeling and tests in dual-port memories, In ETW 2001: proceedings p.19-21, s.n..

BHH Juurlink, D Tcheressiz, S Vassiliadis, H Wijshoff (2001), Implementation and evaluation of the complex streamed instruction set, AD Williams (Eds.), In PACT 2001: proceedings p.73-82, IEEE.

P Hamalainen, M Hannikainen, T Hamalainen, H Corporaal, J Saarinen (2001), Implementation of encryption algorithms on transport triggered architectures, In ISCAS 2001 The 2001 IEEE International symposium on circuits and systems p.726-730, IEEE.

E Ogston, S Vassiliadis (2001), Local distributed agent matchmaking, C Batini, ... [et Al] (Eds.), In Cooperative information systems p.67-79, Springer.

C Feige, MJ Geuzebroek (2001), Logic BIST technology evaluation: an industrial case study, In ETW 2001: Informal Digest p.333-340, s.n..