S Hamdioui, Z Al-Ars, J Jimenez, J Calero (2007), PPM recuction on embedded memories in system on chip, Lisa O'Conner (Eds.), In 12th IEEE European Test Symposium p.85-90, IEEE.

L Hasan, Z Al-Ars (2007), Performance improvement of the Smith-Waterman algorithm, s.n. (Eds.), In Annual Workshop on Circuits, Systems and Signal Processing p.211-214, STW.

S Hamdioui, Z Al-Ars, GN Gaydadjiev, J delos Reyes (2006), Comparison of static and dynamic faults in 65nm memory technology, s.n. (Eds.), In International Design and Test workshop p.-, IEEE.

Z Al-Ars, S Hamdioui, AJ van de Goor, GN Gaydadjiev, J Vollrath (2006), DRAM-specific space of memory tests, s.n. (Eds.), In International Test Conference 2006 p.1-10, IEEE.

EB Tuncer, Z Al-Ars, E Akar, J Beintema, IS Sariyildiz (2006), Designmap: capturing design knowledge in architectural practice, The Joint International Conference on Construction Culture, Innovation and Management (CCIM) p.90-91.

EB Tuncer, Z Al-Ars, E Akar, J Beintema, IS Sariyildiz (2006), Designmap: capturing design knowledge in architectural practice, M Dulaimi (Eds.), In Conference Proceedings of The Joint International Conference on Construction Culture, Innovation and Management (CCIM) p.352-361, BUiD.

Z Al-Ars, S Hamdioui, AJ van de Goor, S Al-Harbi (2006), Influence of bit line coupling and twisting on the faulty behavior of DRAMs, In IEEE Transactions on Computer - Aided Design of Integrated Circuits and Systems Volume 25 p.2989-2996.

S Hamdioui, Z Al-Ars, AJ van de Goor (2006), Opens and delay faults in CMOS RAM address decoder, In IEEE Transactions on Computers Volume 55 p.1630-1639.

Z Al-Ars, S Hamdioui, AJ van de Goor (2006), Space of DRAM fault models and corresponding testing, s.n. (Eds.), In Design Automation & Test in Europe DATE 06 p.1252-1257, IEEE.

S Hamdioui, Z Al-Ars, LL Mhamdi, GN Gaydadjiev, S Vassiliadis (2006), Trends in tests and failure mechanisms in deep sub-micron technologies, P Girard, M Masmoudi, J Mouine, M Renovell (Eds.), In 2006 International conference on Design & Test of Integrated Systems in Nanoscale Technology p.216-221, IEEE.