Z Al-Ars, S Hamdioui (2008), Evaluation of SRAM faulty behavior under bit line coupling, s.n. (Eds.), In 3rd International Design and Test workshop p.231-236, IEEE.

L Hasan, Z Al-Ars, Z Nawaz, K Bertels (2008), Hardware implementation of the Smith-Waterman algorithm using recursive variable expansion, M Abid, M Loulou, A Salem, Y Zorian, A Ivanov (Eds.), In 2008 Third international design and test workshop p.135-140, IEEE.

K Yamasaki, S Hamdioui, Z Al-Ars, AJ van Genderen, GN Gaydadjiev (2008), High quality simulation tool for memory redundancy algorithms, s.n. (Eds.), In 19th Annual Workshop on Circuits, Systems and Signal Processing p.133-138, STW.

Z Al-Ars, S Hamdioui, GN Gaydadjiev, S Vassiliadis (2008), Test set development for cache memory in modern microprocessors, In IEEE Transactions on Very Large Scale Integration (VLSI) Systems Volume 16 p.725-732.

Z Nawaz, M Shabbir, Z Al-Ars, K Bertels (2007), Acceleration of biological sequence alignment using recursive variable expansion, s.n. (Eds.), In Annual Workshop on Circuits, Systems and Signal Processing p.233-237, STW.

Z Al-Ars, S Hamdioui (2007), Automatic analyses of memory faulty behaviour in defective memories, Orailoglu, A. Hamdiuoi, S. (Eds.), In Design & Technology of Integrated Systems 2007 p.41-46, IEEE.

S Kootkar, Z Al-Ars (2007), Design and implementation of reliable wireless sensor networks-a case study in commuter trains, s.n. (Eds.), In Annual Workshop on Circuits, Systems and Signal Processing p.303-306, STW.

L Hasan, Z Al-Ars, S Vassiliadis (2007), Hardware acceleration of sequence alignment algorithms: an overview, Orailoglu, A. Hamdiuoi, S. (Eds.), In Design & Technology of Integrated Systems 2007 p.96-101, IEEE.

Z Al-Ars, S Hamdioui, GN Gaydadjiev (2007), Manifestation of precharge faults in high speed DRAM devices, Krasniewski, E. Gramatova, E. Girard, P., Garbolina, T. (Eds.), In 2007 IEEE workshop on Design and diagnostics of electronic circuits and systems p.179-184, IEEE.

Z Al-Ars, S Hamdioui, GN Gaydadjiev (2007), Optimizing test length for soft faults in DRAM devices, s.n. (Eds.), In 25th IEEE VLSI Test Symposium p.59-66, IEEE.