I Antochi, BHH Juurlink, S Vassiliadis (2002), A flexible simulator for exploring hardware rasterizers, In Proceedings ProRISC 2002 p.1-8.

CR Lageweg, SD Cotofana, S Vassiliadis (2002), A full adder implementation using SET based linear threshold gates, A Baric, et al. (Eds.), In Proceedings 9th IEEE International conference on electronics, circuits and systems - ICECS 2002 p.665-669.

D Crisu, SD Cotofana, S Vassiliadis (2002), A hardware/software co-simulation environment for graphics accelerator development in ARM-based SOCs, In Proceedings of ProRISC 2002 p.255-267.

CJ Glossner, MJ Schulte, S Vassiliadis (2002), A Java-enabled DSP, EF Deprettere, J Teich, S Vassiliadis (Eds.), In Embedded processor design challenges: Systems, Architectures, Modeling, and Simulation - SAMOS p.307-327, Springer.

I Antochi, BHH Juurlink, S Vassiliadis (2002), A low power 2D/3D graphics accelerator; A preliminary ISA, Delft University of Technology.

MD Padure, SD Cotofana, S Vassiliadis, C Dan, M Bodea (2002), A low-power threshold logic family, In ICECS 2002; 9th IEEE International Conference on Electronica, Circuits and Systems p.657-660.

JSSM Wong, B Stougie, SD Cotofana (2002), Alternatives in FPGA-based SAD implementations, In 2002 IEEE international conference on field-programmable technology (FPT) p.449-452.

GK Kuzmanov, S Vassiliadis (2002), ALU Augmentation for MPEG-4 repetitive padding, In MPCS'02 Proceedings of the 2002 Euromicro conference on Massively-Parallel Computing Systems p.-.

CJ Glossner, T Raja, E Hokenek, M Moudgill (2002), A multithreaded processor architecture for SDR, In Proceedings of the Korean Institute of Communication Sciences Volume 19 p.70-85.

L Neuberg, KLM Bertels (2002), An artificial stock market, MH Hamza (Eds.), In Applied Informatics International symposium on artifcial intelligence and applications: Proceedings of the IASTED International Conference p.308-314, Acta Press.