P Celinski, SD Cotofana, D Abbott (2003), Logical effort delay modeling of sense amplifier based charge recycling threshold logic gates, s.n. (Eds.), In Proceedings of ProRISC 2003 p.43-48, STW.

A Snirpunas, A van der Wel, JSSM Wong (2003), Mapping of motion estimation on a VLIW processor template, s.n. (Eds.), In Proceedings of ProRISC 2003 p.571-576, STW.

S Hamdioui, Z Al-Ars, AJ van de Goor, M Rodgers (2003), March SL: a test for all static linked memory faults, s.n. (Eds.), In ATS 2003; proceedings of the twelfth Asian test symposium p.372-377, IEEE.

GG Pechanek, S Vassiliadis, JG Delgado-Frias (2003), Massively parallel array processor.

AJ van de Goor, N Jha, S Gupta (2003), Memory testing, In Testing of digital systems p.845-892, Cambridge University Press.

S Vassiliadis, JSSM Wong, SD Cotofana (2003), Microcode processing: positioning and directions, In IEEE Micro Volume 23 p.21-30.

CJ Glossner, D Iancu, G Nacer, S Stanley, E Hokenek, M Moudgill (2003), Multiple communication protocols for sorftware defined radio, RW Stewart, D Garcia-Alis (Eds.), In IEE colloquium on DSPenabledRadio p.227-236, IEE.

SD Cotofana, CR Lageweg, S Vassiliadis (2003), On computing addition related arithmetic operations via controlled transport of charge, J Bajard, M Schulte (Eds.), In ARITH-16 2003; 16th IEEE symposium on computer arithmetic p.245-252, IEEE.

GL Reijns, AJC van Gemund, H Gautama (2003), On the use of Pierson distributions for the performance prediction of parallel programs, G Kotsis (Eds.), In Performance evaluation - stories and perspectives p.365-379, Österreichische Computer Gesellschaft.

BHH Juurlink, P Kolman, F Meyer Auf Der Heide, I Rieping (2003), Optimal broadcast on parallel locality models, In Journal of Discrete Algorithms (Amsterdam) Volume 1 p.151-166.