J van Muijden, GK Kuzmanov, GN Gaydadjiev (2005), OCM-to-DDR memory controller for VirtexII-Pro FPGA, s.n. (Eds.), In Proceedings of ProRISC 2005, 16th Annual Workshop on Circuits, Systems and Signal Processing p.410-414.
D Borodin, A Terechko, B Juurlink, P Stravers (2005), Optimisation of multimedia applications for the Philips Wasabi multiprocessor system, s.n. (Eds.), In Proceedings of ProRISC 2005, 16th Annual Workshop on Circuits, Systems and Signal Processing p.598-608.
H Fatemi, H Corporaal, T Basten, RP Kleihorst, PP Jonker (2005), Parallellism support in SIMD/VLIW image processing architectures, BJA Krose, HJ Bos, EA Hendriks, JWJ Heijnsdijk (Eds.), In ASCI 2005: Proceedings of the eleventh annual conference of the advanced school for computing and imaging p.291-296.
S Wong, S Vassiliadis, JY Hur (2005), Parallel merge sort on a binary tree on-chip network, s.n. (Eds.), In Proceedings of ProRISC 2005, 16th Annual Workshop on Circuits, Systems and Signal Processing p.365-368.
A Shahbahrami, BHH Juurlink, S Vassiliadis (2005), Performance comparison of SIMD implementations of the discrete wavelet transform, S Vassiliadis, N Dimopoulos, S Rajopadhye (Eds.), In Proceedings of the 16th IEEE International conference on Application-Specific Systems Architectures and Processors (ASAP) p.393-398.
CH Meenderinck, SD Cotofana (2005), Periodic symmetric functions and addition related arithmetic operations in single electron tunneling technology, s.n. (Eds.), In Proceedings of ProRISC 2005, 16th Annual Workshop on Circuits, Systems and Signal Processing p.247-252.
R Fernades Chaves, L Sousa, GK Kuzmanov, S Vassiliadis (2005), Polymorphic AES encryption implementation, s.n. (Eds.), In Proceedings of ProRISC 2005, 16th Annual Workshop on Circuits, Systems and Signal Processing p.343-351.
I Papaefstathiou, T Orphanoudakis, G Kornaros, C Kachris, I Mavroidis, A Nikologiannis (2005), Queue management in network processors, s.n. (Eds.), In Proceedings of Design, automation and test in Europe 2005 (DATE 05) p.112-117.
S Vassiliadis, H Calderón (2005), Reconfigurable multiple operation array, TD Hämäläinen, AD Pimentel, J Takala, S Vassiliadis (Eds.), In Proceedings of the 5th international workshop on computer systems: architectures, modelling, and simulation (SAMOS 2005) p.22-31, Springer.
H Calderón, S Vassiliadis (2005), Reconfigurable universal SAD-multiplier array, s.n. (Eds.), In Proceedings of the 2nd conference on computing frontiers p.72-76, Association for Computing Machinery (ACM).