Z Al-Ars, S Hamdioui, G Mueller, AJ van de Goor (2005), Framework for fault analysis and test generation in drams, s.n. (Eds.), In Proceedings of design, automation and test in Europe 2005 (DATE 05) p.100-105, IEEE.

CJ Glossner, M Moudgill, D Iancu, G Nacer, S Jintukar, S Stanley, M Samori, T Raja, M Schulte, S Vassiliadis (2005), Future wireless convergence platforms, P Eles, A Jantsch, RA Bergamaschi (Eds.), In Proceedings of the 3rd IEEE/ACM/IFIP international conference on hardware/software codesign and system synthesis p.7-12, Association for Computing Machinery (ACM).

C Galuzzi, K Bertels, S Vassiliadis (2005), Graph covering for generating instruction specific application instructions: an overview of some existing methods, s.n. (Eds.), In Proceedings of ProRISC 2005, 16th Annual Workshop on Circuits, Systems and Signal Processing p.502-507, Dutch Technology Foundation.

GK Kuzmanov, S Vassiliadis, JTJ van Eijndhoven (2005), Hardwired MPEG-4 repetitive padding, In IEEE Transactions on Multimedia Volume 7 p.261-268.

I Sourdis, S Vassiliadis (2005), Hashing for IDS pattern matching, s.n. (Eds.), In Symposium proceedings Architectures and compilers for embedded systems (ACES) p.66-68, Academia Press.

CH Meenderinck, SD Cotofana, CR Lageweg (2005), High radix addition via conditional charge transport in single electron tunneling technology, S Vassiliadis, N Dimopoulos, S Rajopadhye (Eds.), In Proceedings of the 16th IEEE International conference on Application-Specific Systems Architectures and Processors (ASAP) p.294-302, IEEE.

M Sima, SD Cotofana, JTJ van Eijndhoven, S Vassiliadis, K Vissers (2005), IEEE-Compliant IDCT on FPGA-augmented trimedia, In Journal of V LSISignal Processing Volume 39 p.195-212.

S Hamdioui, Z Al-Ars, AJ van de Goor, R Wadsworth (2005), Impact of stresses on the fault coverage of memory tests, s.n. (Eds.), In Proceedings of the IEEE international workshop on memory technology, design and testing p.103-108, IEEE.

S Suijkerbuijk, BHH Juurlink (2005), Implementing hardware multithreading in a VLIW processor, SQ Zheng (Eds.), In Parallel and distributed computing and systems, proceedings of the 17th IASTED international p.674-679, ACTA Press.

E Moscu Panainte, K Bertels, S Vassiliadis (2005), Instruction scheduling for dynamic hardware configurations, s.n. (Eds.), In Proceedings of design, automation and test in Europe 2005 (DATE 05) p.100-105, IEEE.