S Hamdioui, JD Reyes (2005), New data-background sequences and their industrial evaluation for word-oriented random-access memories, In IEEE Transactions on Computer - Aided Design of Integrated Circuits and Systems Volume 24 p.892-904.

J van Muijden, GK Kuzmanov, GN Gaydadjiev (2005), OCM-to-DDR memory controller for VirtexII-Pro FPGA, s.n. (Eds.), In Proceedings of ProRISC 2005, 16th Annual Workshop on Circuits, Systems and Signal Processing p.410-414, Dutch Technology Foundation.

D Borodin, A Terechko, B Juurlink, P Stravers (2005), Optimisation of multimedia applications for the Philips Wasabi multiprocessor system, s.n. (Eds.), In Proceedings of ProRISC 2005, 16th Annual Workshop on Circuits, Systems and Signal Processing p.598-608, Dutch Technology Foundation.

S Wong, S Vassiliadis, JY Hur (2005), Parallel merge sort on a binary tree on-chip network, s.n. (Eds.), In Proceedings of ProRISC 2005, 16th Annual Workshop on Circuits, Systems and Signal Processing p.365-368, Dutch Technology Foundation.

H Fatemi, H Corporaal, T Basten, RP Kleihorst, PP Jonker (2005), Parallellism support in SIMD/VLIW image processing architectures, BJA Krose, HJ Bos, EA Hendriks, JWJ Heijnsdijk (Eds.), In ASCI 2005: Proceedings of the eleventh annual conference of the advanced school for computing and imaging p.291-296, ASCI.

A Shahbahrami, BHH Juurlink, S Vassiliadis (2005), Performance comparison of SIMD implementations of the discrete wavelet transform, S Vassiliadis, N Dimopoulos, S Rajopadhye (Eds.), In Proceedings of the 16th IEEE International conference on Application-Specific Systems Architectures and Processors (ASAP) p.393-398, IEEE.

CH Meenderinck, SD Cotofana (2005), Periodic symmetric functions and addition related arithmetic operations in single electron tunneling technology, s.n. (Eds.), In Proceedings of ProRISC 2005, 16th Annual Workshop on Circuits, Systems and Signal Processing p.247-252, Dutch Technology Foundation.

R Fernades Chaves, L Sousa, GK Kuzmanov, S Vassiliadis (2005), Polymorphic AES encryption implementation, s.n. (Eds.), In Proceedings of ProRISC 2005, 16th Annual Workshop on Circuits, Systems and Signal Processing p.343-351, Dutch Technology Foundation.

I Papaefstathiou, T Orphanoudakis, G Kornaros, C Kachris, I Mavroidis, A Nikologiannis (2005), Queue management in network processors, s.n. (Eds.), In Proceedings of Design, automation and test in Europe 2005 (DATE 05) p.112-117, IEEE.

S Vassiliadis, H Calderón (2005), Reconfigurable multiple operation array, TD Hämäläinen, AD Pimentel, J Takala, S Vassiliadis (Eds.), In Proceedings of the 5th international workshop on computer systems: architectures, modelling, and simulation (SAMOS 2005) p.22-31, Springer.