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C Lageweg, SD Cotofana, S Vassiliadis (2001), Digital to analog conversion performed in single electron technology, In IEEE-NANO 2001: proceedings p.105-110, IEEE.

T Niculiu, SD Cotofana (2001), Hierarchical intelligent simulation, In ESM'2001: proceedings p.243-246, Society for Computer Simulation International.

D Crisu, I Antochi, SD Cotofana, BHH Juurlink, S Vassiliadis (2001), Low-power techniques and 2D/3D graphics architectures, s.n..

M Sima, SD Cotofana, S Vassiliadis, JTJ van Eijndhoven, K Vissers (2001), MPEG macroblock parsing and Pel reconstruction on an FPGA-augmented TriMedia processor, In 2001 IEEE International conference on Computer design: VLSI in computers & processors p.425-431, IEEE.

T Niculiu, SD Cotofana (2001), Multi-hierarchical learning-based co-simulation, MH Hamza (Eds.), In Proceedings p.24-29, iASTED.

T Niculiu, C Aktouf, SD Cotofana (2001), Multihierarchical intelligent simulation, In Polytechnical University of Bucharest. Scientific Bulletin. Series C: Electrical Engineering and Computer Science Volume 63 p.15-24.

S Vassiliadis, JSSM Wong, SD Cotofana (2001), Network processors: issues and prospectives, In PDPTA'2001: proceedings. Vol. 4 p.1827-1833, CSREA.

JSSM Wong, S Vassiliadis, SD Cotofana (2001), SAD implementation in FPGA hardware, In ProRISC 2001: proceedings p.738-742, STW Technology Foundation.

C Lageweg, SD Cotofana, S Vassiliadis (2001), Single electron encoded logic circuits, In SAFE 2001: proceedings p.96-102, STW Technology Foundation.