P Stathis, SD Cotofana, S Vassiliadis (2001), Sparse matrix vector multiplication evaluation using the BBCS scheme, Y Manolopoulos, S Evripidou (Eds.), In Proceedings. Vol. 1 p.40-49, s.n..

S Vassiliadis, JSSM Wong, SD Cotofana (2001), The MOLEN þµ-coded processor, G Goos, ... [et Al] (Eds.), In Field-progammable logic and applications p.275-285, Springer.

P Stathis, S Vassiliadis, SD Cotofana (2001), Transposition mechanism for sparse matrices on vector processors, In ProRISC 2001: proceedings p.641-645, STW Technology Foundation.

M Sima, SD Cotofana, S Vassiliadis, JTJ van Eijndhoven (2001), Variable length decoder implemented on a TriMedia/CPU64 reconfigurable functional unit, In ProRISC 2001: proceedings p.605-610, STW Technology Foundation.

M Sima, S Vassiliadis, SD Cotofana, JTJ van Eijndhoven, K Vissers (2000), A taxonomy of custom computing machines, JP Veen (Eds.), In Proceedings p.71-77, STW Technology Foundation.

VM Stanca, H Corporaal, SD Cotofana, S Vassiliadis (2000), Array based structure loop transformations for cache miss reduction, MH Hamza (Eds.), In Proceedings p.278-284, iASTED.

S Vassiliadis, SD Cotofana, P Stathis (2000), BBCS based sparse matrix-vector multiplication: initial evaluation, M Deville, R Owens (Eds.), In Proceedings p.1-6, IMACS.

S Vassiliadis, SD Cotofana, P Stathis (2000), Block based compression storage expected performance, NJ Dimopoulos, KF Li (Eds.), In HPC 2000: proceeding p.389-406, Kluwer Academic Publishers.

SD Cotofana, BHH Juurlink, S Vassiliadis (2000), Counter based superscalar instruction issuing, In Proceedings, vol. 1 p.307-315, IEEE.

A Berlea, SD Cotofana, I Athanasiu, CJ Glossner, S Vassiliadis (2000), Garbage collection for the Delft Java Processor, MH Hamza (Eds.), In Proceedings p.232-238, iASTED.