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T Niculiu, SD Cotofana (2002), Hierarchical intelligent mixed simulation, K Amborski, H Meuth (Eds.), In Modelling and simulation 2002; 16th European simulation multiconference p.159-162, SCS Publishing House.
T Niculiu, C Aktouf, SD Cotofana (2002), High-level intelligence-oriented simulation, In CAS 2002 proceedings, Volume 2 p.381-385, IEEE.
MD Padure, SD Cotofana, S Vassiliadis (2002), High-speed hybrid threshold-Boolean logic, In Proceedings ProRISC 2002 p.384-388, Dutch Technology Foundation STW.
MD Padure, SD Cotofana, S Vassiliadis (2002), High-speed hybrid threshold-boolean logic counters and compressors, s.n. (Eds.), In MWSCAS-2002; proceedings of the 2002 45th Midwest symposium on circuits and systems p.457-460, IEEE.
M Sima, SD Cotofana, S Vassiliadis, JTJ van Eijndhoven, K Vissers (2002), MPEG-compliant entropy decoding on FPGA-augmented TriMedia/CPU64, J Arnold, L Pocek (Eds.), In IEEE Symposium on field-programmable custom computing machines p.261-273, IEEE.
JSSM Wong, S Vassiliadis, SD Cotofana (2002), Microcoded reconfigurable embedded processors: current developments, EF Deprettere, J Teich, S Vassiliadis (Eds.), In Embedded processor design challenges: Systems, Architectures, Modeling, and Simulation - SAMOS p.207-224, Springer.
JSSM Wong, SD Cotofana (2002), On teaching embedded systems design to electrical engineering students, K Fernstrom (Eds.), In 3rd International conference on information communication technologies in education p.505-515, National and Kapodistrian University of Athens.
CR Lageweg, SD Cotofana, S Vassiliadis (2002), Static buffered SET based logic gates, In IEEE-NANO 2002; Proceedings of the 2002 2nd IEEE Conference on Nanotechnology p.491-494, IEEE.
JSSM Wong, G Luo, SD Cotofana (2002), Synthetic benchmark generator for the MOLEN processor, In Proceedings of ProRISC 2002 p.561-567, Dutch Technology Foundation STW.