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D Crisu, SD Cotofana, S Vassiliadis, P Liuha (2004), Efficient hardware for tile-based rasterization, In Proceedings of Pro-RISC 2004 p.352-357, Technology Foundation STW.

JSSM Wong, S Vassiliadis, SD Cotofana (2004), Future directions of programmable and reconfigurable embedded processors, SS Bhattacharyya, EF Deprettere, J Teich (Eds.), In Domain-specific processors; Systems, architectures, modeling, and simulation p.235-258, Marcel Dekker.

D Crisu, SD Cotofana, S Vassiliadis, P Liuha (2004), GRAAL - A development framework for embedded graphics accelerators, G Gielen, J Figueras (Eds.), In Design, automation and test in Europe; Date04 Proceedings p.1366-1367, IEEE.

L Huang, D Crisu, SD Cotofana (2004), Heuristic algorithms for primitive traversal acceleration in tile-based rasterization, In Proceedings of Pro-RISC 2004 p.408-414, Technology Foundation STW.

T Niculiu, SD Cotofana (2004), Hierarchical intelligent simulation, I Smit, W Wallach, GE Lasker (Eds.), In Cognitive, emotive and ethical aspects of decision making in humans and in artificial intelligence p.45-50, Int'l Inst. for Adv. Studies in Systems Res. and Cybernetics.

T Niculiu, M Ciuc, SD Cotofana (2004), Hierarchical models for intelligent reconfigurable simulation, In Proceedings of the Fifteenth IASTED International Conference on Modelling and Simulation p.350-355, ACTA Press.

T Niculiu, SD Cotofana (2004), Hierarchical templates for simulated intelligence, In EUROSIM- Simulation News Europe Volume 38/39 p.16-22.

T Niculiu, C Aktouf, SD Cotofana (2004), Hierarchical testability assisted intelligent simulation, In International Journal of Modelling & Simulation Volume 24 p.26-36.

D Crisu, SD Cotofana, S Vassiliadis, P Liuha (2004), High-level energy estimation for ARM-based SOCs, AD Pimentel, S Vassiliadis (Eds.), In Computer systems: architectures, modeling, and simulation p.168-177, Springer.