CR Lageweg, SD Cotofana, S Vassiliadis (2004), Binary multiplication based on Single Electron Tunneling, B Werner (Eds.), In 15th IEEE International conference on application-specific systems, architectures, and processors - ASAP 2004 p.152-166.

AM Molnos, MJM Heijligers, SD Cotofana, JTJ van Eijndhoven (2004), Cache partitioning options for compositional multimedia applications, In Proceedings of Pro-RISC 2004 p.86-90.

C Hu, SD Cotofana, J Jiang (2004), Compact current and current noise models for single-electron tunneling transistors, In IEEE-NANO 2004 Proceedings p.1-4.

AM Molnos, MJM Heijligers, SD Cotofana, JTJ van Eijndhoven (2004), Compositional memory systems for data intensive applications, G Gielen, J Figueras (Eds.), In Design, automation and test in Europe; Date04 Proceedings p.1-2.

P Celinski, D Abbott, SD Cotofana (2004), Delay evaluation of high speed data-path circuits based on threshold logic, E Macii, V Paliouras, O Koufopavlou (Eds.), In Integrated circuit and system design; Power and timing modeling, optimization and simulation p.899-906.

D Crisu, SD Cotofana, S Vassiliadis, P Liuha (2004), Determining a coverage mask for a pixel.

D Crisu, SD Cotofana, S Vassiliadis, P Liuha (2004), Efficient hardware for antialiasing coverage mask generation, B Werner (Eds.), In Proceedings Computer Graphics International p.257-265.

D Crisu, SD Cotofana, S Vassiliadis, P Liuha (2004), Efficient hardware for tile-based rasterization, In Proceedings of Pro-RISC 2004 p.352-357.

JSSM Wong, S Vassiliadis, SD Cotofana (2004), Future directions of programmable and reconfigurable embedded processors, SS Bhattacharyya, EF Deprettere, J Teich (Eds.), In Domain-specific processors; Systems, architectures, modeling, and simulation p.235-258.

D Crisu, SD Cotofana, S Vassiliadis, P Liuha (2004), GRAAL - A development framework for embedded graphics accelerators, G Gielen, J Figueras (Eds.), In Design, automation and test in Europe; Date04 Proceedings p.1366-1367.