SD Cotofana, A Schmid, Y Leblebici, A Ionescu, O Soffke, P Zipf, M Glesner, A Rubio (2005), CONAN - a design exploration framework for reliable nano-electronics architectures, S Vassiliadis, N Dimopoulos, S Rajopadhye (Eds.), In Proceedings of the 16th IEEE International conference on Application-Specific Systems Architectures and Processors (ASAP) p.260-267, IEEE.
AM Molnos, MJM Heijligers, SD Cotofana, JTJ van Eijndhoven (2005), Compositional memory systems for multimedia communicating tasks, s.n. (Eds.), In Proceedings of design, automation and test in Europe 2005 (DATE 05) p.932-937, IEEE.
CH Meenderinck, SD Cotofana (2005), Computing periodic symmetric functions in single electron tunneling technology, s.n. (Eds.), In Proceedings of international semiconductor conference (CAS, 2005) p.47-50, IEEE.
CH Meenderinck, CR Lageweg, SD Cotofana (2005), Design methodology for single electron based building blocks, s.n. (Eds.), In Proceedings of 2005 5th IEEE Conference on Nanotechnology p.271-274, IEEE.
CH Meenderinck, SD Cotofana, CR Lageweg (2005), High radix addition via conditional charge transport in single electron tunneling technology, S Vassiliadis, N Dimopoulos, S Rajopadhye (Eds.), In Proceedings of the 16th IEEE International conference on Application-Specific Systems Architectures and Processors (ASAP) p.294-302, IEEE.
M Sima, SD Cotofana, JTJ van Eijndhoven, S Vassiliadis, K Vissers (2005), IEEE-Compliant IDCT on FPGA-augmented trimedia, In Journal of V LSISignal Processing Volume 39 p.195-212.
AM Molnos, MJM Heijligers, SD Cotofana, JTJ van Eijndhoven (2005), Inter-task cache sharing for compositional embedded multiprocessors, s.n. (Eds.), In Proceedings of ProRISC 2005, 16th Annual Workshop on Circuits, Systems and Signal Processing p.404-409, Dutch Technology Foundation.
CH Meenderinck, SD Cotofana (2005), Periodic symmetric functions and addition related arithmetic operations in single electron tunneling technology, s.n. (Eds.), In Proceedings of ProRISC 2005, 16th Annual Workshop on Circuits, Systems and Signal Processing p.247-252, Dutch Technology Foundation.
KC Li, MD Padure, SD Cotofana (2005), ¿MOS enhanced differential current-switch threshold logic gates, s.n. (Eds.), In Proceedings of ProRISC 2005, 16th Annual Workshop on Circuits, Systems and Signal Processing p.530-535, Dutch Technology Foundation.
D Crisu, S Vassiliadis, SD Cotofana, P Liuha (2004), 3D graphics tile-based systolic scan-conversion, MB Matthews (Eds.), In Signals, Systems and Computers, 2004. Conference Record of the Thirty-Eighth Asilomar Conference on p.517-521, IEEE.