SD Cotofana (2007), On effective computation with single electron tunneling devices, s.n. (Eds.), In DCIS2007 p.293-298.

AM Molnos, SD Cotofana, MJM Heijligers, JTJ van Eijndhoven (2007), Static cache partitioning robustness analysis for embedded on-chip multi-processors, O'Boyle, M Bodin, F Stenström, P, McKee, S (Eds.), In Transactions on high-performance embedded architectures and compilers I p.279-297.

K Bertels, SD Cotofana, GN Gaydadjiev, KGW Goossens, S Hamdioui, B Juurlink, AJ van Genderen, S Wong (2007), The Future of computing.

D Milosavljevic, SD Cotofana (2006), A method to analyze the fault tolerance of molecular quantum-dot cellular automata systems, s.n. (Eds.), In Proceedings 2006 International Semiconductor conference p.399-402.

I Koryfides, SD Cotofana, J van Gassel (2006), A power aware HW/SW partitioning for a DVB-H receiver module, s.n. (Eds.), In 17th Annual Workshop on Circuits Systems and Signal Processing p.293-299.

CH Meenderinck, SD Cotofana (2006), Basic building blocks for effective single electron tunneling technology based computation, s.n. (Eds.), In Proceedings 2006 International Semiconductor conference p.57-60.

AM Molnos, MJM Heijligers, SD Cotofana, JTJ van Eijndhoven (2006), Compositional, efficient caches for a chip multi-processor, s.n. (Eds.), In Design Automation & Test in Europe DATE 06 p.345-350.

CH Meenderinck, SD Cotofana (2006), Computing division in the electron counting paradigm using single electron tunneling technology, s.n. (Eds.), In 2006 Sixth IEEE conference on Nanotechnology p.-.

CH Meenderinck, SD Cotofana (2006), Electron counting based high-radix multiplication in single electron tunneling technology, s.n. (Eds.), In 2006 IEEE International Symposium on Circuits and Systems (ISCAS 2006)O p.4571-4574.

CR Lageweg, SD Cotofana (2006), Evaluation methodology for single electron encoded threshold logic gates, M. Glesner, R. Reis, L. Indrusiak, V. Mooney, H. Eveking (Eds.), In VLSI-SOC: From Systems to Chips p.263-280.