Said Hamdioui, Lei Xie, Hoang Anh Du Nguyen, Mottaqiallah Taouil, Koen Bertels, Henk Corporaal, Hailong Jiao, Francky Catthoor, Dirk Wouters, Linn Eike, Jan van Lunteren (2015), Memristor Based Computation-in-Memory Architecture for Data-Intensive Applications, W. Nebel (Eds.), In Proceedings of the 2015 Design, Automation and Test in Europe Conference and Exhibition p.1718-1725, IEEE.

S Hamdioui, M Taouil, HA Du Nguyen, A Haron, L Xie, K Bertels (2015), Memristor: the enabler of computation-in-memory architecture for big-data, s.n. (Eds.), In International Conference on Memristive Systems, MEMRISYS p.1-3, IEEE Society.

Y Sfikas, YE Tsiatouhas, M Taouil, S Hamdioui (2015), On resistive open defect detection in DRAMs: The charge accumulation effect, L Miclea, P Prinetto (Eds.), In Proceedings - 20th IEEE European Test Symposium p.1-6, IEEE Society.

M Taouil, S Hamdioui (2015), Post-bond interconnect test and diagnosis for 3-D memory stacked on logic, In IEEE Transactions on Computer - Aided Design of Integrated Circuits and Systems Volume 34 p.1860-1872.

P Bernardi, L Ciganda, MS Reorda, S Hamdioui (2015), SW-based transparent in-field memory testing, V Champac, Y Zorian (Eds.), In Proceedings - 16th IEEE Latin-American Test Symposium p.1-6, IEEE Society.

M Taouil, S Hamdioui, EJ Marinissen (2015), Yield Improvement for 3D wafer-to-wafer stacked ICs using wafer matching, In ACM Transactions on Design Automation of Electronic Systems Volume 20 p.1-23.

S Hamdioui (2014), 3D/ 2.5D stacked IC cost modeling and test flow selection, DTIS 2014, Santorini, Greece p.1-1.

MSK Seyab, IO Agbo, S Hamdioui, H Kukner, B Kaczer, P Raghavan, F Catthoor (2014), Bias temperature instability analysis of FinFET based SRAM cells, W Nebel, G Fettweis (Eds.), In Proceedings of the 2014 International Conference on Design, Automation & Test in Europe p.1-6, EDAA.

H Kukner, F Khan, P Weckx, P Raghavan, S Hamdioui, B Kaczer, F Catthoor, L van der Perre, R Lauwereins, G Groeseneken (2014), Comparison of reaction-diffusion and atomistic trap-based BTI models for logic gates, In IEEE Transactions on Device and Materials Reliability Volume 14 p.182-193.

EJ Marinissen, B De Wachter, K Smith, J Kiesewetter, M Taouil, S Hamdioui (2014), Direct probing on large-array fine-pitch micro-bumps of a wide-I/O logic-memory interface, M Purtell, S Mitra (Eds.), In Proceedings 2014 IEEE International Test Conference p.1-10, ITC & IEEE.