D Ludovici, A Strano, D Bertozzi (2009), Architecture design principles for the integration of synchronization interfaces into network-on-chip switches, s.n. (Eds.), In Second International workshop on network on chip architectures p.31-36, Association for Computing Machinery (ACM).

D Theodoropoulos, GK Kuzmanov, GN Gaydadjiev (2009), A reconfigurable beamformer for audio applications, s.n. (Eds.), In 2009 IEEE 7th symposium on application specific processors p.80-87.

KA Gbolagade, SD Cotofana (2009), A reverse converter for the new 4-moduli set {2n+3, 2n+2, 2n+1, 2n}, s.n. (Eds.), In 2009 IEEE international conference on electronics circuits and systems p.113-116.

D Ludovici, F Gilabert, S Medardoni, C Gomez, ME Gomez, P Lopez, GN Gaydadjiev, D Bertozzi (2009), Assessing fat-tree topologies for regular network-on-chip design under nanoscale technology constraints, s.n. (Eds.), In Proceedings design, automation and test in Europa p.562-565.

C Galuzzi (2009), Automatically fused instructions algorithm for the customization of the instruction-set of a reconfigurable architecture, PhD Thesis Delft University of Technology.

M Enachescu, SD Cotofana, D Tsamados (2009), Can SG-FET replace Fet in sleep mode circuits, s.n. (Eds.), In 4th international conference on Nano-Networks p.1-5.

D Ludovici, GN Gaydadjiev, D Bertozzi, L Benini (2009), Capturing topology-level implications of link synthesis techniques for nanoscale networks-on-chip, s.n. (Eds.), In Proceedings of the 2009 Great Lakes symposium on VLSI p.125-128, Association for Computing Machinery (ACM).

D Theodoropoulos, A Siskos, DN Pnevmatikatos (2009), CCproc: a custom VLIW cryptography co-processor for symmetric-key ciphers, In Lecture Notes in Computer Science p.318-323.

D Ludovici, A Strano, D Bertozzi, L Benini, GN Gaydadjiev (2009), Comparing tightly and loosely coupled mesochronous synchronizers in a NoC switch architecture, s.n. (Eds.), In International Symposium on network-on-chip p.244-249.

M Sabeghi, VM Sima, K Bertels (2009), Compiler assisted runtime task scheduling on a reconfigurable computer, s.n. (Eds.), In 19th international conference on field programmable logic and applications p.44-50.