EK Bankas, KA Gbolagade, SD Cotofana (2013), An effective new CRT based reverse converter for a novel moduli set { 2^(2n+1)-1, 2^(2n+1), 2^(2n)-1 }, T El-Ghawazi, M Smith et al (Eds.), In Proceedings 2013 IEEE 24th International Conference on Application-specific Systems, Architectures and Processors p.142-146, IEEE.
C Bira, L Gugu, R Hobincu, V Codreanu, L Petrica, SD Cotofana (2013), An energy effective SIMD accelerator for visual pattern matching, s.n. (Eds.), In 4th International symposium on highly efficient accelerators and reconfigurable technologies p.1-4, ACM.
N Aymerich, SD Cotofana, A Rubio (2013), Controlled degradation stochastic resonance in adaptive averaging cell based architectures, In IEEE Transactions on Nanotechnology Volume 12 p.888-896.
M Lefter, GR Voicu, M Taouil, M Enachescu, S Hamdioui, SD Cotofana (2013), Is TSV-based 3D integration suitable for inter-die memory repair?, s.n. (Eds.), In Design, automation & test in Europe conference & exhibition p.1-4, IEEE.
Y Wang, SD Cotofana, L Fang (2013), Lifetime reliability assessment with aging information from low-level sensors, J Ayala (Eds.), In Proceedings of the 23rd ACM International Conference on Great Lakes Symposium on VLSI p.339-340, ACM.
GR Voicu, SD Cotofana (2013), Towards heterogenous 3D-stacked reliable computing with von Neumann multiplexing, s.n. (Eds.), In 9th ACM/IEEE International Symposium on Nanoscale Architectures) p.1-6, IEEE.
M Enachescu, M Lefter, A Bazigos, A Ionescu, SD Cotofana (2013), Ultra low power NEMFET based logic, In IEEE International symposium on circuits and systems p.566-569, IEEE.
L Petrica, V Codreanu, SD Cotofana (2013), VASILE: a reconfigurable vector architecture for instruction level frequency scaling, s.n. (Eds.), In 12th IEEE low voltage low power conference p.1-4, IEEE.
GR Voicu, M Enachescu, SD Cotofana (2012), A 3D stacked high performance scalable architecture for 3D fourier transform, s.n. (Eds.), In 30th IEEE international conference on computer design p.1-2, IEEE.
N Cucu Laurenciu, SD Cotofana (2012), A Markovian, variation-aware circuit-level aging model, s.n. (Eds.), In International symposium on nanoscale architectures p.1-7, IEEE.