IS Irobi (2011), Analysis and Test Development for Parasitic Fails in Deep Sub-Micron Memory Devices, PhD Thesis Delft University of Technology.

D Andrade, A Rubio, A Calomarde, SD Cotofana (2011), Analysis of delay mismatching of digital circuits caused by common environmental fluctuations, EAB Silva, TS Lande (Eds.), In Proceedings 2011 IEEE International Symposium on Circuits and Systems p.2585-2588.

KA Gbolagade, GR Voicu, SD Cotofana (2011), An Efficient FPGA Design of Residue-to-Binary Converter for the Moduli Set {2n+1,2n,2n-1},, In IEEE Transactions on Very Large Scale Integration (VLSI) Systems Volume 19 p.1500-1503.

M Nadeem, JSSM Wong, GK Kuzmanov (2011), An Efficient Hardware Design for Intra-prediction in H.264/AVC Decoder, s.n. (Eds.), In Saudi International Electronics, Communications and Photonics Conference 2011 (SIECPC) p.1-6.

A Beyranvand Nejad, M Escudero Martinez, KGW Goossens (2011), An FPGA Bridge Preserving Traffic Quality of Service for On-Chip Network-Based Systems, BM Al-Hashimi (Eds.), In Design, Automation and Test in Europe Conference and Exhibition (DATE 2011) p.1-6.

RA Stefan, KGW Goossens (2011), An improved algorithm for slot selection in the Æthereal Network-on-Chip, J Flich, D Bertozzi, T Skei, D Ludovici (Eds.), In Proceedings of the Fifth ACM Interconnection Network Architecture, On-Chip Multi-Chip Workshop (INA-OCMC) p.7-10, Association for Computing Machinery (ACM).

AP Pereira de Azevedo Filho, BHH Juurlink (2011), An Instruction to Accelerate Software Caches, M Berekovic, W Fornaciari, U Brinkschulte, C Silvano (Eds.), In Proceedings of the 2011 Conference on Architecture of Computing Systems p.158-170, Springer.

MA Wahlah, KGW Goossens (2011), A Non-Intrusive Online FPGA Test Scheme Using A Hardwired Network on Chip, P Kitsos (Eds.), In 14th Euromicro Conference on Digital System Design p.351-359.

MF Nadeem, SA Ostadzadeh, M Ahmadi, M Nadeem, JSSM Wong (2011), A Novel Dynamic Task Scheduling Algorithm for Grid Networks with Reconfigurable Processors, s.n. (Eds.), In 5th HiPEAC Workshop on Reconfigurable Computing p.21-30.

L Hasan, Z Al-Ars (2011), An Overview of Hardware-based Acceleration of Biological Sequence Alignment, HS Lopes, LM Cruz (Eds.), In Computational Biology and Applied Bioinformatics p.187-202.