N Aymerich, SD Cotofana, A Rubio (2012), Degradation stochastic resonance (DSR) in AD-AVG architectures, s.n. (Eds.), In 12th IEEE International conference on nanotechnology p.1-4, IEEE Society.

AT Nelson, AM Molnos, A Beyranvand Nejad, D Mirzoyan, SD Cotofana, KGW Goossens (2012), Embedded computer architecture laboratory: a hands-on experience programming embedded systems with resource and energy constraints, s.n. (Eds.), In Workshop on embedded and cyber-physical systems education p.1-8, Association for Computing Machinery (ACM).

S Safiruddin, DV Borodin, M Lefter, GR Voicu, SD Cotofana (2012), Is 3D integration the way to future dependable computing platforms?, s.n. (Eds.), In 3th International conference on optimization of electrical and electronic equipment p.1-10, IEEE Society.

M Enachescu, GR Voicu, SD Cotofana (2012), Is the road towards "zero-energy" paved with NEMFET-based power management?, In IEEE International symposium on circuits and systems p.1-4, IEEE Society.

Y Wang, SD Cotofana, L Fang (2012), Statistical reliability analysis of NBTI impact on FinFET SRAMs and mitigation technique using independent-gate devices, s.n. (Eds.), In ACM International symposium on nanoscale architectures p.1-7, IEEE Society.

S Safiruddin, F Peper, SD Cotofana (2012), Stigmergic search with single electron tunneling technology based memory enhanced hubs, s.n. (Eds.), In IEEE/ACM International Symposium on Nanoscale Architectures p.1-7, IEEE Society.

Y Wang, M Enachescu, SD Cotofana, L Fang (2012), Variation tolerant on-chip degradation sensors for dynamic reliability management systems, In Microelectronics Reliability Volume 52 p.1-6.

S Safiruddin, M Lefter, DV Borodin, GR Voicu, SD Cotofana (2012), Zero-performance-overhead online fault detection and diagnosis in 3D stacked integrated circuits, s.n. (Eds.), In ACM International symposium on nanoscale architectures p.1-8, IEEE Society.

Y Wang, SD Cotofana, Liang Fang (2011), A Uni¿ed Aging Model of NBTI and HCI Degradation towards Lifetime Reliability Management for Nanoscale MOSFET Circuits, CA Moritz, I O'Connor (Eds.), In 2011 IEEE/ACM International Symposium on Nanoscale Architectures p.175-180, IEEE Society.

KA Gbolagade, GR Voicu, SD Cotofana (2011), An Efficient FPGA Design of Residue-to-Binary Converter for the Moduli Set {2n+1,2n,2n-1},, In IEEE Transactions on Very Large Scale Integration (VLSI) Systems Volume 19 p.1500-1503.