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Gou Chunyang, Georgi Kuzmanov, Georgi N. Gaydadjiev (2008), SAMS: Single-affiliation multiple-stride parallel memory scheme, In Conference on Computing Frontiers - Proceedings of the 2008 Workshop on Memory Access on Future Processors p.359-367.

C Gou, GK Kuzmanov, GN Gaydadjiev (2008), SAMS: Single-affiliation memory-stride parallel memory scheme, s.n. (Eds.), In Computing Frontiers 2008 p.359-367, s.n..

D Theodoropoulos, YD Yankova, GK Kuzmanov, K Bertels (2007), Automatic hardware generation for the Molen reconfigurable architecture: a G721 case study, s.n. (Eds.), In Annual Workshop on Circuits, Systems and Signal Processing p.380-387, STW.

CB Ciobanu, B Spinean, GK Kuzmanov, GN Gaydadjiev (2007), Customized vector instruction set architecture, s.n. (Eds.), In Annual Workshop on Circuits, Systems and Signal Processing p.128-137, STW.

YD Yankova, K Bertels, GK Kuzmanov, GN Gaydadjiev, Y Lu, S Vassiliadis (2007), DWARV: Delftworkbench automated reconfigurable VHDL generator, Najjar, W. Van Genderen, A Bertels, K. (Eds.), In 2007 International conference on field programmable logic and applications p.697-701, IEEE Society.

B Spinean, CB Ciobanu, GK Kuzmanov, GN Gaydadjiev (2007), Design considerations for a domain specific vector microarchitecture, s.n. (Eds.), In Annual Workshop on Circuits, Systems and Signal Processing p.178-184, STW.

K Bok van der, R Chaves Fernandes, GK Kuzmanov, L Sousa, AJ van Genderen (2007), Dynamic FPGA reconfigurations with run-time region delimitation, s.n. (Eds.), In Annual Workshop on Circuits, Systems and Signal Processing p.201-207, STW.

GK Kuzmanov, WM Oijen van (2007), Floating-point matrix multiplication in a polymorphic processor, Andy Ye Takeshi Ikenaga Hideharu Amano (Eds.), In ICFPT 2007 p.249-252, s.l..

K Bertels, GK Kuzmanov, E Panainte, GN Gaydadjiev, YD Yankova, VM Sima, K Sigdel, RJ Meeuws, S Vassiliadis (2007), HaRTES toolchain early evaluation: profiling, compilation and HDL generation, Najjar, W. Van Genderen, A Bertels, K. (Eds.), In 2007 International conference on field programmable logic and applications p.402-408, IEEE Society.