Bedri Sendir, Madhusudhan Govindaraju, Rei Odaira, Peter Hofstee (2021), Low Latency and High Throughput Write-Ahead Logging Using CAPI-Flash, In IEEE Transactions on Cloud Computing Volume 9 p.1129-1142.

T. Ahmad, Z. Al-Ars, H.P. Hofstee (2021), VC@Scale: Scalable and high-performance variant calling on cluster environments, In GigaScience p.1-13.

Jian Fang, Jianyu Chen, Jinho Lee, Zaid Al-Ars, Peter Hofstee (2020), An Efficient High-Throughput LZ77-Based Decompressor in Reconfigurable Logic, In Journal of Signal Processing Systems Volume 92 p.931-947.

Baozhou Zhu, Zaid Al-Ars, H. Peter Hofstee (2020), NASB: Neural Architecture Search for Binary Convolutional Neural Networks, In 2020 International Joint Conference on Neural Networks, IJCNN 2020 - Proceedings p.1-8, IEEE .

Tanveer Ahmad, Nauman Ahmed, Zaid Al-Ars, H. Peter Hofstee (2020), Optimizing performance of GATK workflows using Apache Arrow In-Memory data framework, In BMC Genomics Volume 21 p.1-14.

Baozhou Zhu, Zaid Al-Ars, H. Peter Hofstee (2020), ReAF: Reducing approximation of channels by reducing feature reuse within convolution, In IEEE Access Volume 8 p.169957-169965.

Johannus Willem Peltenburg, Matthijs Brobbel, Jeroen Van Straten, Zaid Al-Ars, Peter Hofstee (2020), Tydi: an open specification for complex data structures over hardware streams, In IEEE Micro Volume 40 p.120-130.

Jian Fang, Jianyu Chen, Jinho Lee, Zaid Al-Ars, Peter Hofstee (2019), A Fine-Grained Parallel Snappy Decompressor for FPGAs Using a Relaxed Execution Model, In 2019 IEEE 27th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM) p.335-335, IEEE .

Laurens van Dam, Johan Peltenburg, Zaid Al-Ars, H. Peter Hofstee (2019), An Accelerator for Posit Arithmetic Targeting Posit Level 1 BLAS Routines and Pair-HMM, In CoNGA'19 Proceedings of the Conference for Next Generation Arithmetic 2019 p.5:1--5:10, Association for Computing Machinery (ACM).

J.W. Peltenburg, Jeroen Van Straten, Lars Wijtemans, Lars Van Leeuwen, Zaid Al-Ars, Peter Hofstee (2019), Fletcher: A framework to efficiently integrate FPGA accelerators with apache arrow, Ioannis Sourdis, Christos-Savvas Bouganis, Carlos Alvarez, Leonel Antonio Toledo Diaz, Pedro Valero, Xavier Martorell (Eds.), In Proceedings - 29th International Conference on Field-Programmable Logic and Applications, FPL 2019 p.270-277, Institute of Electrical and Electronics Engineers (IEEE).